Make

GNU Make is a program that runs using scripts, and allows for assembly of simple to complex build scripts. As software projects become increasingly complex, the compilation/linking process can become very long and tedious to do by hand. Makefiles provide a way to automate this process.

Examples

Anatomy of a Makefile

A Makefile will contain variable declarations first, and will then contain Makefile targets. These targets

Simple Example

The following set of C++ files comprises a driver program and a C++ object used by the driver. The process of compiling this object, then compiling the driver, is presented.

The files related to the C++ class A are A.cc:

#include <A.h>
#include <iostream>

A::A( int x ) : x_(x) {}

A::~A() {};

void A::echo() {
  std::cout << "x = " << x_ << "\n";
}

and A.h:

class A {

  public:
    A( int x );
    ~A();
    void echo();

  private:
    int x_;
};

The driver file, Driver.cc, is:

#include <A.h>
#include <iostream>

int main()
{
     A* obj = new A( 5 );
     obj->echo();
     delete obj;
}